DS620U+【PDF 8/15 页】IC THERMOMETER/STAT DIG 8MSOP

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DS620 Digital Thermometer and Thermostat

8 of 15

PO PIN

The PO pin is a user-programmable open-drain output, which is configured through the PO1 and PO2 bits in the

configuration register. PO can operate as a thermostat output (PO

-HIGH

or PO

-LOW

), or it can be forced low for control

of peripheral devices. When PO is configured as PO

-HIGH

or PO

-LOW

, this pin operates as described in the

Thermostat Operation section. This pin can be reconfigured at anytime to switch between functions. Table 3

defines the various configuration options for this pin.

Table 3. PO Configuration

Function

PO2

PO1

Thermostat Output (PO-high)

Thermostat Output (PO-low)

Force PO Low

EEPROM REGISTERS AND MEMORY MAP

The DS620 has a 14-byte linear address space with registers for temperature, thermostat thresholds, and control

as well as four bytes of user EEPROM for general use. All address space is shadowed by RAM. The DS620

Memory Map is shown in Table 4.

See the Writing to the DS620 and the Reading from the DS620 sections for details in writing to and reading from

the DS620 EEPROM registers and memory map.

Table 4. Memory Map

Address (hex) Description

TH MSB

TH LSB

TL MSB

TL LSB

User

Undefined

Temperature MSB

Temperature LSB

Configuration MSB

Configuration LSB

CONFIGURATION REGISTER

The configuration register allows the user to program various DS620 options such as conversion resolution,

operating mode, and thermostat capability. It also provides information to the user about conversion status,

EEPROM activity, device address, and thermostat activity. The configuration register is arranged as shown in

Figure 5 and detailed descriptions of each bit are provided in Table 5. It is located in address spaces ACh (MSB)

and ADh (LSB) in the DS620 memory. Note that the R0, R1, AUTOC, 1SHOT, and PO1 bits are stored in

EEPROM so they can be programmed prior to installation if desired. All other configuration bits are SRAM and

power up in the state shown in Table 5.

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